Research / Past / Analog Computing
My past research focused on compilation techniques for ultra-low power reconfigurable analog computing platforms. Using these techniques, I implemented a compiler that takes as input a dynamical system (a system of first-order differential equations) and produces as output a configuration of the analog device whose physical behavior that implements the dynamical system.
This compiler, dubbed the Legno compiler, is the first to target a real reconfigurable analog device for solving differential equations. It produces configurations that execute dynamical systems from the physics, biology and controls domains with acceptable error while consuming significantly less energy than corresponding digital computations.
The Legno Analog Compilation Toolchain
My recent work involved developing a compilation toolchain for the Columbia HCDCv2 analog chip. This is the first compilation toolchain that targets an analog differential equation-solving analog device. This toolchain is able to efficiently target space-efficient, current-mode reconfigurable analog hardware and reason about a broad range of physical phenomena, including manufacturing variations, quantization error, noise, and bandwidth limitations. This toolchain includes a runtime system, custom firmware, and a hardware calibration and profiling framework. This is joint work with Yannis Tsividis and Sendyne.
Sendyne is expanding production of development boards with the Columbia HCDCv2 analog chip. These boards will be tested using my automated profiling framework and shipped with my compilation toolchain.
Automated Scaling of Analog Configurations
Without Scaling Transform
Before Recovery
After Recovery
The physical behavior of an analog device can have a profound impact on the implemented computation. Relevant phenomena include quantization error, noise, manufacturing variations, and frequency, current, and voltage range limitations. For an analog device configuration to faithfully implement a dynamical system, it must not violate the physical limitations of the analog hardware. A compilation goal is therefore to transform the configuration to abide by the physical restrictions imposed by the device, while ensuring the dynamics of the original dynamical system can be recovered at runtime.
I have developed a novel technique for automatically scaling values in the analog device configuration so that it executes within the physical limitations of the analog device. The scaled analog configuration preserves the original dynamics of the system -- that is, the original dynamics of any signal can be recovered at runtime by multiplying it by a statically derived constant factor. By exploiting a property of dynamical systems, this technique is able to manipulate the speed of the dynamical system by carefully scaling constants in the analog device configuration.
Configuration Synthesis for Analog Computing Platforms
To implement a dynamical system on an analog device, the analog building blocks resident on the device must be configured and routed together so that the physics of the device (behavior of the currents/voltages over time) matches the behavior of the dynamical system. Because analog blocks are often engineered for efficiency and generality rather than ease of use, there may be a substantial semantic gap between the dynamical system and the analog hardware. The goal of the configuration synthesis procedure is to derive a configuration for the analog device that implements a given dynamical system, subject to the resource and connectivity constraints of the analog device.
I developed compilation techniques for synthesizing analog device configurations that are guaranteed to be algebraically equivalent to the provided dynamical system -- that is, the configuration implements a dynamical system that can be transformed into the original dynamical system by successively applying algebraic rewrite rules. Because there is no prevailing dominant architecture for these analog devices, the approach used to generate configurations depends on the high-level design of the device. I have developed compilers that synthesize configurations for two classes of analog hardware.
Complex Blocks, Simple Routing: Arco is a compiler that targets analog hardware with computational building blocks that implement complicated functions in a permissive routing environment
Specialized Blocks, Complex Routing: Legno is a compiler that targets analog hardware with compute, copying, and routing blocks in a restrictive routing environment that favors exploiting programmable connections for spatially co-located blocks.